Introduction & Performance

This week introduces the fundamental concepts of computer architecture and quantitative performance analysis. We cover the Von Neumann model, the distinction between RISC and CISC philosophies, and the Iron Law of Performance that relates instruction count, CPI, and clock cycle time.

Learning Objectives

Understand the Von Neumann architecture model

Distinguish between RISC and CISC design philosophies

Apply the CPU performance equation to compare processors

Use Amdahl's Law to evaluate the impact of optimizations

Key Concepts

Computer Architecture Overview

Computer architecture defines the interface between hardware and software. The Von Neumann model describes a stored-program computer with a CPU, memory, and I/O connected by buses. Modern processors follow either RISC (Reduced Instruction Set Computer) or CISC (Complex Instruction Set Computer) design philosophies.

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Von Neumann bottleneck: single bus between CPU and memory limits throughput
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RISC: simple fixed-length instructions, load/store architecture, many registers
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CISC: variable-length instructions, memory-to-memory operations, fewer registers
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Harvard architecture separates instruction and data memory to increase bandwidth

Performance Metrics

Quantitative performance analysis uses the Iron Law: $\text{CPU Time} = IC \times CPI \times T_{cycle}$ . Instruction Count (IC) depends on the ISA and compiler, CPI (Cycles Per Instruction) depends on the micro-architecture, and cycle time depends on the technology and organization.

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CPU Time = Instruction Count × CPI × Clock Cycle Time
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CPI can vary per instruction class; use weighted average CPI
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MIPS (Million Instructions Per Second) is not always a fair comparison metric
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Amdahl's Law: Speedup is limited by the non-optimized fraction of execution

W2: Instruction Set Architecture