Exam Simulation
4 practice exams · 7 questions each · 70 minutes
Practice under real exam conditions. Write your solutions on paper just like the real exam, then grade yourself using the provided rubric and solution guide.
Sample Midterm 1
Practice exam covering Weeks 1-6: ISA & instruction encoding, pipeline scheduling, forwarding & stalls, branch prediction, out-of-order execution (Tomasulo), cache hit/miss tracing, and cache design calculations.
Midterm 1
First midterm exam covering Weeks 1-6: ISA addressing modes, pipeline CPI calculations, data hazard forwarding paths, branch prediction with BTB, register renaming, cache miss rate analysis, and set-associative cache with LRU.
Sample Midterm 2
Practice exam covering Weeks 7 and 9-12: SRAM vs DRAM technology, virtual memory page table walks, TLB analysis, I/O interrupts and DMA, HDD vs SSD performance, PCI/USB bus bandwidth, and cache coherence with the MESI protocol.
Midterm 2
Second midterm exam covering Weeks 7 and 9-12: DRAM refresh timing and banking, multi-level page table design, TLB coverage and EMAT, DMA vs polling comparison, RAID configurations, bus arbitration protocols, and SIMD with Flynn's taxonomy.
How It Works
- - Each exam has 7 questions worth 10 points each (70 total)
- - Questions are open-ended: calculations, diagrams, analysis
- - Write your answers on paper or in the text field, just like the real exam
- - When done, submit and grade yourself using the rubric for each question
- - The solution guide shows the expected approach and key steps